Only 2 banks available
switch is implemented by high/low of VIA ORB PB6
switching is usually done by setting the corresponding DDR register to input (PB6 goes high automatically) or output (PB6 goes low automatically)
vectrex default state is PB6 = INPUT
PB6 high enables BANK 1
PB6 low enables BANK 0
therefor the default vectrex bank upon startup is BANK 1!
Here John Dondzilas original rec.games.vectrex post (29.10.1999):
EXTRA ! EXTRA ! READ ALL ABOUT IT - PCJOHN AND ANOTHER VECTREX FIRST !!!
Thanks to Peter Pachla's suggestion, I spent the last 2 nights working on
the software selectable mini bankswitch cart and I'm pleased to announce:
SUCCESS !!!
Hardware wise is really easy, just wire the PB6 line (pin 35) to the
high address line (A15) on the 64K EPROM.
The software end was a little trickier, the 6522 info I have and the actual
execution of the thing don't work quite the same ...
Basically, if you set the PB6 line to INPUT, it seems to automatically go
high. If you set it to OUTPUT, it goes low. You can send a high bit in the
output mode, but it will only pulse once, then reset to low. This could be
useful for larger carts, but I need the 2 banks to stay steady right now without
re-writing all 8 programs. I'm not sure if my manual is wrong or the Vec does
this, either way - it works. Now I just need to test it on some more machines
before I implement it into the final package.
Looks like emulator users will be getting Volume I and Volume II
seperate binaries.
JD
Emulator:
if a bin file is 32k < Size <= 64K, Vide assumes this bankswitch scheme
Some additional info - from my Vide blog:
Something at least a little bit Vide related:
Bankswitching some things to consider
It seemed there was a bug in Vide which I corrected (from next version on) regarding bankswitching,
The "classic" bankswitching (as first done by John Dondzila) uses the cartridge line 35, which is directly connected to the VIA. More exactly to VIA port B bit 6 (hence PB6 line).
The state of PB6 is "calculated" quite easy as:
â if pb6 is in input mode (corresponding bit 6 of ddrb is 0) â than pb6 is always 1 (well â if someone on the cartridge side âwrites a 0â than not â but usually the cartridges do NOT write to pb6)
â if pb6 is in output mode â pb6 is always that which is written to pb6
Knowing the above and also knowing that the BIOS never writes anything other than "0" (zero) zo PB6 â bankswitching is done very easily by just switching pb6 from input mode to output mode or vice versa to change the state of the line (and thus do bankswitching). (also remember â the BIOS quite often writes to port B, so if you do NOT use the input/output method, you better make sure, that bit 6 is always correct!)
VIA is "clever" enough to remember the last value that was set to PB6. So if you set PB6 to 0, switch to bank one (by switching to input mode) PB6 READS 1 (but still remembers 0 as last WRITTEN value). If you switch back to bank 0 (by switching to output mode), PB6 will READ 0 (zero) again â clever.
Now the trap.
Anyway â since I often do my own output routines I ran into following trap:
clr <VIA port b
inc <VIA port b
That instruction sequence is not really uncommon. The first line enables the mux and sets the mux to y-integrators. The second line disables the mux (and usually after that you set a value to portA and than have set xy coordinates of some sort).
The thing is â if you do above sequence while in bank 0 (pb6 = 0) the value in port B is (binary): % 0000 0001 â pretty much what you suspect.
If you do the same sequence while in bank 1 (pb6 in input mode â always reads 1) the value in port B is (binary): % 0100 0001
The "inc" instruction does a READ from pb6. And that read is always 1. The inc instruction internally READS the value, increases the value by one and WRITES the value back. And thus VIA does not remember the last zero we set anymore â since the last value that was set was a ONE (by the inc instruction).
If you try to switch back to bank 0 using the above input/output method you will NOT switch, since PB6 is not set to zero anymore.